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Physics · AQA 7408 · Paper 3 Section B: Electronics · June 2022

AQA A Level Physics Paper 3 Section B: Electronics June 2022 question paper 7408/3BE

35 marks

Practise the past exam questions by topic

AQA 7408 · Paper 3BE

5 questions
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Question 1

Figure for question 1
Question 1, shown as an image

Figure 1

Figure for question 1
Figure for question 1

[1 mark]

Answer
Mark scheme for question 1.1
Figure for question 1

State any assumptions made in your answer.

[2 marks]

Answer
Mark scheme for question 1.2

Figure 2A shows the input signal Vin that is applied to the circuit in Figure 1.

Figure for question 1 Figure for question 1

The circuit in Figure 1 has a closed loop gain of −20 and has power-supply voltages of ± 6.0 V.

Draw, on Figure 2B, the output waveform from the operational amplifier circuit over the same time interval as that shown on Figure 2A.

[2 marks]

Answer
Mark scheme for question 1.3

A student converts the circuit in Figure 1 into one that will add two input signals V1

Question 1, shown as an image

The new circuit produces an output voltage Vout so that:

Question 1, shown as an image

The circuit is to include a 27 kΩ feedback resistor.

Complete Figure 3 to show the circuit that the student constructs. Annotate your circuit with the values of any additional components.

Figure 3

Figure for question 1

[3 marks]

Answer
Mark scheme for question 1.4

Question 2

Figure 4 shows a logic system made of logic gates labelled 1 to 6 The logic system has inputs A and B and outputs X, Y and Z.

Figure for question 2

Write the simplest Boolean algebra expression for output X in terms of inputs A and B.

[2 marks]

State the name of logic gate 5 in Figure 4.

[1 mark]

Complete Table 1, the truth table for this logic system.

Figure for question 2

[2 marks]

Suggest a single logic gate that can replace the combination of gates 5 and 6 in this system.

[1 mark]

The logic system in Figure 4 is designed to indicate which of inputs A and B has the larger binary value, or whether the values are the same. Each decision is indicated by one of the outputs X, Y or Z becoming a logic 1

Which row identifies the outputs X, Y and Z ? Tick (maths symbol) one box.

Question 2, shown as an image
Figure for question 2

[1 mark]

Question 3

Figure 5 shows the output signal from the tuner circuit of a radio receiver.

The radio carrier wave is amplitude modulated by a single-frequency test tone.

Figure for question 3

Determine the frequency, in kHz, of the carrier wave.

Question 3, shown as an image

[1 mark]

Answer
Mark scheme for question 3.1

Determine the frequency, in kHz, of the test tone.

Question 3, shown as an image

[2 marks]

Answer
Mark scheme for question 3.2

State one advantage of using frequency modulation (FM) rather than amplitude modulation (AM).

[1 mark]

Answer
Mark scheme for question 3.3

The frequency range of the FM radio band in the UK is 88 to 108 MHz.

The FM stations are allocated centre frequencies that start at 88.100 MHz and are separated by 200 kHz.

Calculate the maximum number of stations allowed within the range.

Question 3, shown as an image

[1 mark]

Answer
Mark scheme for question 3.4

A radio station broadcasting on FM transmits a maximum audio frequency of 15 kHz and has a frequency deviation of ± 75 kHz.

Deduce whether the radio station fits the FM bandwidth allocation in the UK.

[2 marks]

Answer
Mark scheme for question 3.5

Question 4

Figure 6 shows a type of NOT gate called a Schmitt Trigger. This is connected to a capacitor of capacitance C and a resistor of resistance R to make an oscillator circuit. The circuit is used to produce continuous clock pulses.

Figure for question 4

Vout switches HIGH or LOW when the input voltage Vc passes through one of two trigger voltage values.

The output voltage Vout switches to:

• LOW when Vc rises and reaches the upper trigger voltage VU

• HIGH when Vc falls and reaches the lower trigger voltage VL.

Initially the capacitor is uncharged and Vc is at 0 V.

Explain the sequence of actions of this circuit as the output goes through one full cycle. The first two stages have been done for you.

You should refer to the RC circuit in Figure 6 and to VU and VL in your answer.

Stage 1: Since Vc is LOW, the output is HIGH.

Stage 2: The capacitor now charges through the resistor, making Vc rise.

[3 marks]

Answer
Mark scheme for question 4.1

Figure 7 shows the oscillator circuit after it has been modified by the addition of:

• two diodes D1 and D2

• a potential divider that has a total resistance value of (RA + RB).

Figure for question 4

In this particular circuit:

• the time tH for the output signal to be HIGH is given by tH = 0.7C (R + RB)

• the time tL for the output signal to be LOW is given by tL = 0.7C (R + RA).

The slider of the potential divider is moved towards X, as shown in Figure 7.

State and explain the effect of this change on:

• the mark-to-space ratio (tH: tL)

• the pulse rate frequency (PRF).

mark-to-space ratio

[4 marks]

Answer
Mark scheme for question 4.2

Question 5

Figure 8 shows island A, a fully developed island off the mainland coast. The island is connected to the mainland by a fibre optic cable lying along the seabed and it also has a satellite link.

Nobody lives on island B, but it is due to be developed as a major holiday resort over the next 5 years.

Moveable oil rig C is due to explore the four sites marked ‘ X ’ for oil and gas over a 9-month period.

Figure for question 5

A communications company has been asked to provide solutions for island B which will allow the development to begin immediately and then later to support a fully developed holiday resort.

A communications solution is also required for oil rig C during the 9-month exploration period.

Describe appropriate solutions involving fibre optic cabling and satellite communication systems for each of the two clients, island B and oil rig C.

In your answer you should:

• outline the way each communications system operates

• suggest, with reasons, your choice of system for each solution.

[6 marks]

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