Question 1
Figure 1 shows part of a circuit that includes a 4-bit binary counter. The main inputs and outputs of the counter are shown. The counter generates a sequence of binary codes representing the decimal numbers 0 to 7 Output Q0 is the least significant bit of the binary codes.
The counter resets when the master reset pin MR receives a logic 1
The circuit requires the counter to reset when either one of two conditions is met.
Condition 1 Manual reset using the switch P to reset the counter to 0
Condition 2 Automatic reset when an appropriate binary code is produced at the counter outputs. This will cause the counter to continually cycle through the decimal numbers 0 to 7
Complete Figure 1 to show how both reset conditions can be met.
Do not show the power line connections to the integrated circuit.
[3 marks]
A logic system is designed to identify prime numbers.
The binary codes from the counter are now applied to the inputs ABC of the logic system shown in Figure 2.
Input A takes the least significant bit of the binary code from the counter.
Output W becomes logic state 1 when a prime number 2, 3, 5 or 7 is detected. Otherwise output W is at logic 0
Write the Boolean algebra expression for output W in terms of the inputs A, B and C. The expression must contain only the four logic gate operations shown in Figure 2.
[2 marks]
Complete Table 1, the truth table for the logic system in Figure 2.
[1 mark]
The logic system in Question 01.2 is replaced with one that gives an output S using the same binary input codes CBA.
The Boolean algebra equation for output S is
Deduce which decimal numbers 0 to 7 will cause S to become logic 1
[1 mark]
Complete Figure 3 by drawing the logic system for S.
You must use only the logic gate operations given in S = A B.(+ C)
Figure 3
[2 marks]