BREAKING
Spring stretched past its limit, student relates★Local teen draws ray diagram, light refuses to cooperate★Air resistance ignored again, files formal complaint★
  1. Home
  2. A Level
  3. Physics
  4. AQA
  5. Logic gates and combinational logic

AQA A Level Physics

Topic questions Electronics Logic gates & combinational logic

Logic gates & combinational logic

10 questions · 78 marks · about 1.5 hours

Logic gates and combinational logic questions

AQA 7408 Logic gates and combinational logic 10 questions

Paper 3 Section B: Electronics June 2025, Question 1 8 marks

1.1

Figure 1 shows a system diagram for a timer designed by a student.

Figure for question 1

The system displays the numbers from 00 to 59 before resetting. The timer is designed to count in time intervals of 1 s.

Part of Figure 1 is enclosed within dashed lines. Figure 2 shows an incomplete circuit diagram for this part of the system. Figure 2 also includes a switch S that is used to manually reset both counters.

Figure for question 1

Each counter in Figure 2 advances by 1 when CK receives the rising edge of a pulse. When R on a counter receives a logic 1, that counter resets.

Complete the circuit diagram in Figure 2 by adding:

• logic gates to select the reset code for each counter

• a link to show how the second counter is triggered from the first counter

• a resistor with switch S to form the manual reset

• logic gates for each of the counters to provide the reset conditions at R.

[5]
Reveal mark scheme Mark scheme for question 1.1
1.2

Another student designs a logic system to combine judgements from three people. When at least two of the three people input logic 1, the system provides an output of logic 1. Otherwise, the output is logic 0.

The three people are represented by inputs X, Y and Z.

The output Q from this logic system is given by the Boolean expression:

Question 1, shown as an image

Complete Figure 3 to show the combinational logic diagram for this expression. Use only the logic gates indicated in the expression. Do not transform the expression.

Figure 3

Figure for question 1
[2]
Reveal mark scheme Mark scheme for question 1.2
1.3

A single logic gate can sometimes be used to replace a more complex logic system.

Figure 4 shows a logic system with inputs A and B and output Q.

Figure for question 1

Which single logic gate could replace this combinational logic system?

Tick (maths symbol) one box.

Figure for question 1
[1]
Reveal mark scheme Mark scheme for question 1.3

Paper 3 Section B: Electronics June 2024, Question 1 8 marks

Also involves Potential dividers

A toy manufacturer is designing a two-tone siren for use in small battery-operated cars. Figure 1 shows design Option 1.

Option 1 uses three separate signal generators feeding into a logic sub-system. The signal generators produce logic-compatible 9 V square waves of frequencies 1024 Hz, 1 Hz and 512 Hz.

Figure for question 1

The waveforms shown are not to scale.

1.1

Explain how the logic level applied at B in Figure 1 determines the output frequency at Q.

[2]
Reveal mark scheme Mark scheme for question 1.1
1.2

Write the Boolean algebra expression for output Q in terms of the inputs A, B and C. Use only the logic operations shown in Figure 1.

[2]
Reveal mark scheme Mark scheme for question 1.2
1.3

Option 1 is tested by replacing the 1 Hz signal generator with a manual input.

The manual input is provided by the combination of a push-to-make switch and a 10 kΩ resistor.

The combination produces the following voltages at its output:

• 0 V when the switch is not pressed

• 9 V when the switch is pressed.

Figure 2 shows the symbol for the push-to-make switch.

Figure 2

Complete Figure 3 to show how this switch and the 10 kΩ resistor are connected. Label the output Vout. You do not need to add details taken from Figure 1.

Figure 3

Figure for question 1
[1]
Reveal mark scheme Mark scheme for question 1.3
1.4

Figure 4 shows a generalised layout of an integrated circuit (IC) for an N-bit binary counter. Q0 is the output that provides the least significant bit.

Figure for question 1

A signal generator feeds a square wave of frequency 1024 Hz into the clock of the IC. The N-bit binary counter generates the 512 Hz signal and the 1 Hz signal from separate outputs.

Deduce which of the outputs Q0 to QN will provide the 1 Hz signal.

[1]
Reveal mark scheme Mark scheme for question 1.4
1.5

To make the two-tone siren, the manufacturer decides to use a new design, Option 2

Option 2 contains:

• one 1024 Hz signal generator

• one N-bit binary counter

• a new logic sub-system as shown in Figure 5.

Figure for question 1

Assume that:

• each type of logic gate has its own dedicated IC chip

• each separate signal generator is based upon its own IC chip.

Compare the number of ICs used in Option 1 with the number used in Option 2. Go on to explain one advantage of the manufacturer’s decision.

[2]
Reveal mark scheme Mark scheme for question 1.5

Paper 3 Section B: Electronics June 2023, Question 1 7 marks

Figure 1 shows the input and output pins for a 4-bit binary counter. The output pin for the least significant bit is A.

Figure for question 1
1.1

Complete Figure 1 by adding a single logic gate to the binary counter so that the circuit functions as a modulo-6 counter.

Figure 2 shows three outputs of the modulo-6 counter connected to a logic sub-system that controls a 7-segment display. The decimal point on the display is not shown. The whole system shown in Figure 2 is to be used as an electronic dice.

Figure for question 1

Segments in the 7-segment display are turned on or off by the logic sub-system to display the decimal numbers 1 to 6 in sequence. A segment in the display turns on when the logic output with the same letter as the segment is at logic 1.

[2]
Reveal mark scheme Mark scheme for question 1.1
1.2

Table 1 shows how the values of CBA control the logic level applied to each of the segments a to g during the counting cycle.

Figure for question 1

One of the logic outputs a to g is controlled by a single NOT gate. This gate uses one of the inputs A, B or C.

State the input that is used and the segment that this NOT gate controls.

Question 1, shown as an image
[1]
Reveal mark scheme Mark scheme for question 1.2
1.3

X represents one of the logic outputs. The Boolean expression for this output is:

Question 1, shown as an image

State which of the logic outputs a to g is being controlled by this function.

[1]
Reveal mark scheme Mark scheme for question 1.3
1.4

Y represents another of the logic outputs. The Boolean expression for this output is:

Question 1, shown as an image

Complete Figure 3 to show the combination of logic gates needed to represent the expression. You should only use logic gates that represent the individual functions shown in the expression.

Figure 3

Figure for question 1
[3]
Reveal mark scheme Mark scheme for question 1.4

Paper 3 Section B: Electronics June 2022, Question 2 7 marks

Figure 4 shows a logic system made of logic gates labelled 1 to 6 The logic system has inputs A and B and outputs X, Y and Z.

Figure for question 2
2.1

Write the simplest Boolean algebra expression for output X in terms of inputs A and B.

[2]
Reveal mark scheme Mark scheme for question 2.1
2.2

State the name of logic gate 5 in Figure 4.

[1]
Reveal mark scheme Mark scheme for question 2.2
2.3

Complete Table 1, the truth table for this logic system.

Figure for question 2
[2]
Reveal mark scheme Mark scheme for question 2.3
2.4

Suggest a single logic gate that can replace the combination of gates 5 and 6 in this system.

[1]
Reveal mark scheme Mark scheme for question 2.4
2.5

The logic system in Figure 4 is designed to indicate which of inputs A and B has the larger binary value, or whether the values are the same. Each decision is indicated by one of the outputs X, Y or Z becoming a logic 1

Which row identifies the outputs X, Y and Z ? Tick (maths symbol) one box.

Question 2, shown as an image
Figure for question 2
[1]
Reveal mark scheme Mark scheme for question 2.5

Paper 3 Section B: Electronics November 2021, Question 2 7 marks

Also involves Potential dividers

A burglar-alarm system in a house sounds an alarm during the hours of darkness when one of the following conditions is met:

• the door is opened

• the window is opened

• both the door and the window are opened.

Figure 5 shows the main burglar-alarm subsystems and the logic status for the inputs and output.

Figure for question 2
2.1

Table 2 is a partially completed truth table for the logic subsystem.

Figure for question 2

Complete Table 2.

[1]
Reveal mark scheme Mark scheme for question 2.1
2.2

Figure 6 shows the symbol of the push-to-make switch used in the door detector. When the door is closed, the switch button is pushed down onto the contacts. It automatically releases when the door opens.

Figure for question 2

Complete Figure 7 to show how this switch, together with a 10 kΩ resistor, can be connected to create the door detector circuit in Figure 5.

Label the output of the circuit with an X.

Figure for question 2
[2]
Reveal mark scheme Mark scheme for question 2.2
2.3

Figure 8 shows a logic circuit for a different alarm system.

Figure for question 2

Write the Boolean algebra expression for Q in terms of inputs A, B and C. In your answer use only AND and NOR operators.

[2]
Reveal mark scheme Mark scheme for question 2.3
2.4

Figure 9 shows a logic circuit that has the same function as the circuit in Figure 8. Only one type of gate is used in the circuit in Figure 9.

Figure for question 2

State the logic function performed by gate 4.

[1]
Reveal mark scheme Mark scheme for question 2.4
2.5

Microchips containing two-input logic gates are mass-produced. Each microchip contains four identical logic gates.

A manufacturer of the logic circuit used in the burglar alarm chooses to make the circuit in Figure 9 rather than that in Figure 8.

Suggest why.

[1]
Reveal mark scheme Mark scheme for question 2.5

Paper 3 Section B: Electronics November 2020, Question 1 9 marks

Figure 1 shows part of a circuit that includes a 4-bit binary counter. The main inputs and outputs of the counter are shown. The counter generates a sequence of binary codes representing the decimal numbers 0 to 7 Output Q0 is the least significant bit of the binary codes.

Figure for question 1

The counter resets when the master reset pin MR receives a logic 1

The circuit requires the counter to reset when either one of two conditions is met.

Condition 1 Manual reset using the switch P to reset the counter to 0

Condition 2 Automatic reset when an appropriate binary code is produced at the counter outputs. This will cause the counter to continually cycle through the decimal numbers 0 to 7

1.1

Complete Figure 1 to show how both reset conditions can be met.

Do not show the power line connections to the integrated circuit.

[3]
Reveal mark scheme Mark scheme for question 1.1
1.2

A logic system is designed to identify prime numbers.

The binary codes from the counter are now applied to the inputs ABC of the logic system shown in Figure 2.

Input A takes the least significant bit of the binary code from the counter.

Output W becomes logic state 1 when a prime number 2, 3, 5 or 7 is detected. Otherwise output W is at logic 0

Figure for question 1

Write the Boolean algebra expression for output W in terms of the inputs A, B and C. The expression must contain only the four logic gate operations shown in Figure 2.

[2]
Reveal mark scheme Mark scheme for question 1.2
1.3

Complete Table 1, the truth table for the logic system in Figure 2.

Figure for question 1
[1]
Reveal mark scheme Mark scheme for question 1.3
1.4

The logic system in Question 01.2 is replaced with one that gives an output S using the same binary input codes CBA.

The Boolean algebra equation for output S is

Question 1, shown as an image

Deduce which decimal numbers 0 to 7 will cause S to become logic 1

[1]
Reveal mark scheme Mark scheme for question 1.4
1.5

Complete Figure 3 by drawing the logic system for S.

You must use only the logic gate operations given in S = fraction A B.(+ C)

Figure 3

Figure for question 1
[2]
Reveal mark scheme Mark scheme for question 1.5

Paper 3 Section B: Electronics June 2019, Question 1 8 marks

Also involves Current, resistance and potential difference · Resistors and I-V characteristics

Figure 1 shows the basic layout for a Johnson decade counter. The main input is the clock (CK). The main outputs are shown as Q 0 to Q 9.

Figure for question 1
1.1

Figure 2 shows part of the timing diagram for a Johnson decade counter. This timing diagram shows the output logic states against time. The counter is reset to make Q 0 = 1 and then the first two pulses are applied.

Complete Figure 2 to show the logic states of Q 0, Q 1 and Q 2.

Figure for question 1
[2]
Reveal mark scheme Mark scheme for question 1.1
1.2

A student sets up the counter to make the traffic light sequence:

red → red + amber → green → amber

The sequence then repeats.

Figure 3 shows a partially completed diagram for producing this sequence.

Draw an OR gate and connections on Figure 3 so that the LEDs go through the complete sequence.

Figure 3

Figure for question 1
[1]
Reveal mark scheme Mark scheme for question 1.2
1.3

State two factors that determine the ON time for the green LED shown in Figure 3.

[2]
Reveal mark scheme Mark scheme for question 1.3
1.4

The potential difference across the green LED is 2.1 V when it is lit. The current through it should not exceed 9 mA.

All logic gate outputs are: logic low = 0 V logic high = 9 V.

The student suggests that a resistor of resistance 720 Ω and a tolerance of ±5% should be used for R.

Deduce whether the student’s suggestion would be suitable.

[3]
Reveal mark scheme Mark scheme for question 1.4

Paper 3 Section B: Electronics June 2019, Question 4 9 marks

Also involves Resistors and I-V characteristics · Electrical power and energy transfers · Potential dividers

A silicon-based 5.1 V Zener diode requires a minimum operating current I of 5.0 mA to maintain its Zener voltage Vz.

4.1

Draw on Figure 11 the general Imaths symbolV characteristic for this diode.

Figure for question 4
[2]
Reveal mark scheme Mark scheme for question 4.1
4.2

Figure 12 shows a circuit that uses a 5.1 V Zener diode. The circuit causes the output W of the operational amplifier to change at a particular light intensity.

Figure for question 4

State the function of the Zener diode in this circuit.

[1]
Reveal mark scheme Mark scheme for question 4.2
4.3

Deduce whether a 100 Ω, 0.13 W resistor is suitable for R in Figure 12.

[2]
Reveal mark scheme Mark scheme for question 4.3
4.4

The circuit in Figure 12 is rebuilt and the position of R is swapped with the position of the Zener diode.

Explain how this affects the light intensity at which W changes.

[2]
Reveal mark scheme Mark scheme for question 4.4
4.5

The output W from the operational amplifier shown in Figure 12 becomes one of three inputs to the combinational logic circuit shown in Figure 13.

Figure for question 4

Write the Boolean algebra expression for the output Q in terms of W, X and Y based on the logic gates shown in Figure 13.

Q =

[1]
Reveal mark scheme Mark scheme for question 4.5
4.6

Output Q from Figure 13 becomes the input to the final part of the circuit shown in Figure 14.

Figure for question 4

The circuit uses a MOSFET to activate a relay.

State one property that makes the MOSFET suitable for interfacing with logic gates.

[1]
Reveal mark scheme Mark scheme for question 4.6

Paper 3 Section B: Electronics June 2018, Question 1 7 marks

1.1

Two logic inputs, A and B, feed into the logic circuit shown in Figure 1. The logic output from the circuit is Q.

Figure for question 1

Deduce the Boolean expression for the output of this logic circuit in terms of inputs A and B. Include all the logic operations that take place between the inputs and the output.

[2]
Reveal mark scheme Mark scheme for question 1.1
1.2

The truth table shows some of the logic states for the logic gates in Figure 1.

Complete the truth table.

BACDEFQ
00100
01111
10001
11000
[2]
Reveal mark scheme Mark scheme for question 1.2
1.3

Figure 2 shows a different logic circuit that produces the same logic output as that of Figure 1.

Figure for question 1

A manufacturer wants to produce a system that uses this logic function, but is undecided as to which circuit to use.

Suggest, giving reasons, two benefits of using the logic circuit in Figure 2 compared to the logic circuit in Figure 1.

[2]
Reveal mark scheme Mark scheme for question 1.3
1.4

State the single logic gate that would perform the same logic function as the circuits shown in Figure 1 and Figure 2.

[1]
Reveal mark scheme Mark scheme for question 1.4

Paper 3 Section B: Electronics June 2017, Question 2 8 marks

Figure for question 2
Question 2, shown as an image
Figure for question 2

A student makes an electronic version of this by feeding pulses from a pulse generator into a 4-bit binary counter.

The circuit uses the first three outputs of the counter A (least significant bit), B and C.

By feeding the outputs from the counter through logic gates, the seven LEDs shown in Figure 4 can be made to display the numbers 1 to 6 in sequence.

Figure for question 2

Figure 5 shows the sequence of numbers.

Figure for question 2

The partially completed truth table in Table 1 shows which of the LEDs (L1 to L6) are ON (logic 1) and which are OFF (logic 0) during the counting sequence.

Figure for question 2
2.1

Complete Table 1 to show the logic outputs for the lamps L1 and L6.

[2]
Reveal mark scheme Mark scheme for question 2.1
2.2

Deduce the simplest Boolean expression that can be used to show how output L7 can be controlled by the logic inputs.

[1]
Reveal mark scheme Mark scheme for question 2.2
2.3

Figure 6 shows some of the input and output pins of the 4-bit binary counter.

Figure for question 2

The data sheet for the counter indicates that the counter resets when the reset pin R is taken from logic 0 to logic 1.

Draw on Figure 6 the logic gate needed and the connections required from the outputs to the reset pin R on the counter so that the counter cycles as required.

[2]
Reveal mark scheme Mark scheme for question 2.3
2.4

The output of both L3 and L4 can be written as (A. B. Cmaths symbol) + (Bmaths symbol. C)

Figure 7 shows part of a logic circuit needed to represent this Boolean expression.

Complete the logic circuit in Figure 7 by adding AND, OR and NOT gates.

Figure for question 2
[3]
Reveal mark scheme Mark scheme for question 2.4

Report a problem with a question on this page
What is wrong?

Goes to whoever maintains the question split. No account needed and nothing is published on this page.

Memes

Certified Physics memes. Peer-reviewed by nobody.

Laugh now. Cry in the exam hall later. Then come back and do a past paper.

Rearrange the equation
Write the units and pray
Me when the equation sheet doesn’t have it
Knowing F = ma
Rearranging F = ma
Explaining why the satellite doesn’t fall
Blaming being late on Newton’s first law
Physics enlightenment, ranked

Mum 💖

how's physics going sweetie?? 🥰

revising forces and motion rn

come and set the table 💖

📱 Screen time this week · TikTok6h 7m

A body at rest stays at rest

Physics starter pack

Spring stretched beyond repairRay box that’s always too hotMetre rule used as a swordThis website
Collect all four. Equal and opposite.